
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version   : 0.4.0
// timestamp : Fri Dec  4 15:11:13 2020 GMT
// usage     : riscv_ctg \
//                  -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
//                  -- xlen 32 \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the jal instruction of the RISC-V I extension for the jal covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32I")

.section .text.init
.org 0x80
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",jal)

RVTEST_SIGBASE( x2,signature_x2_1)

inst_0:
// rd==x21, imm_val < 0, 
// opcode: jal; dest:x21; immval:0x55556; align:0
TEST_JAL_OP(x13, x21, 0x55556, 1b, x2, 0,0)

inst_1:
// rd==x3, imm_val > 0, 
// opcode: jal; dest:x3; immval:0x6; align:0
TEST_JAL_OP(x13, x3, 0x6, 3f, x2, 4,0)

inst_2:
// rd==x29, imm_val == (-(2**(18))), 
// opcode: jal; dest:x29; immval:0x40000; align:0
TEST_JAL_OP(x13, x29, 0x40000, 1b, x2, 8,0)

inst_3:
// rd==x27, imm_val == ((2**(18))), 
// opcode: jal; dest:x27; immval:0x40000; align:0
TEST_JAL_OP(x13, x27, 0x40000, 3f, x2, 12,0)

inst_4:
// rd==x0, 
// opcode: jal; dest:x0; immval:0x0; align:0
TEST_JAL_OP(x13, x0, 0x0, 3f, x2, 16,0)

inst_5:
// rd==x4, 
// opcode: jal; dest:x4; immval:0x0; align:0
TEST_JAL_OP(x13, x4, 0x0, 3f, x2, 20,0)

inst_6:
// rd==x22, 
// opcode: jal; dest:x22; immval:0x0; align:0
TEST_JAL_OP(x13, x22, 0x0, 3f, x2, 24,0)

inst_7:
// rd==x16, 
// opcode: jal; dest:x16; immval:0x0; align:0
TEST_JAL_OP(x13, x16, 0x0, 3f, x2, 28,0)

inst_8:
// rd==x12, 
// opcode: jal; dest:x12; immval:0x0; align:0
TEST_JAL_OP(x13, x12, 0x0, 3f, x2, 32,0)

inst_9:
// rd==x28, 
// opcode: jal; dest:x28; immval:0x0; align:0
TEST_JAL_OP(x13, x28, 0x0, 3f, x2, 36,0)

inst_10:
// rd==x11, 
// opcode: jal; dest:x11; immval:0x0; align:0
TEST_JAL_OP(x13, x11, 0x0, 3f, x2, 40,0)

inst_11:
// rd==x30, 
// opcode: jal; dest:x30; immval:0x0; align:0
TEST_JAL_OP(x13, x30, 0x0, 3f, x2, 44,0)

inst_12:
// rd==x10, 
// opcode: jal; dest:x10; immval:0x0; align:0
TEST_JAL_OP(x13, x10, 0x0, 3f, x2, 48,0)

inst_13:
// rd==x1, 
// opcode: jal; dest:x1; immval:0x0; align:0
TEST_JAL_OP(x13, x1, 0x0, 3f, x2, 52,0)

inst_14:
// rd==x20, 
// opcode: jal; dest:x20; immval:0x0; align:0
TEST_JAL_OP(x13, x20, 0x0, 3f, x2, 56,0)

inst_15:
// rd==x19, 
// opcode: jal; dest:x19; immval:0x0; align:0
TEST_JAL_OP(x13, x19, 0x0, 3f, x2, 60,0)

inst_16:
// rd==x24, 
// opcode: jal; dest:x24; immval:0x0; align:0
TEST_JAL_OP(x13, x24, 0x0, 3f, x2, 64,0)

inst_17:
// rd==x7, 
// opcode: jal; dest:x7; immval:0x0; align:0
TEST_JAL_OP(x13, x7, 0x0, 3f, x2, 68,0)

inst_18:
// rd==x6, 
// opcode: jal; dest:x6; immval:0x0; align:0
TEST_JAL_OP(x13, x6, 0x0, 3f, x2, 72,0)

inst_19:
// rd==x8, 
// opcode: jal; dest:x8; immval:0x0; align:0
TEST_JAL_OP(x13, x8, 0x0, 3f, x2, 76,0)

inst_20:
// rd==x31, 
// opcode: jal; dest:x31; immval:0x0; align:0
TEST_JAL_OP(x13, x31, 0x0, 3f, x2, 80,0)

inst_21:
// rd==x26, 
// opcode: jal; dest:x26; immval:0x0; align:0
TEST_JAL_OP(x13, x26, 0x0, 3f, x2, 84,0)

inst_22:
// rd==x5, 
// opcode: jal; dest:x5; immval:0x0; align:0
TEST_JAL_OP(x13, x5, 0x0, 3f, x2, 88,0)

inst_23:
// rd==x15, 
// opcode: jal; dest:x15; immval:0x0; align:0
TEST_JAL_OP(x13, x15, 0x0, 3f, x2, 92,0)

inst_24:
// rd==x23, 
// opcode: jal; dest:x23; immval:0x0; align:0
TEST_JAL_OP(x13, x23, 0x0, 3f, x2, 96,0)

inst_25:
// rd==x25, 
// opcode: jal; dest:x25; immval:0x0; align:0
TEST_JAL_OP(x13, x25, 0x0, 3f, x2, 100,0)

inst_26:
// rd==x18, 
// opcode: jal; dest:x18; immval:0x0; align:0
TEST_JAL_OP(x13, x18, 0x0, 3f, x2, 104,0)

inst_27:
// rd==x9, 
// opcode: jal; dest:x9; immval:0x0; align:0
TEST_JAL_OP(x13, x9, 0x0, 3f, x2, 108,0)

inst_28:
// rd==x13, 
// opcode: jal; dest:x13; immval:0x0; align:0
TEST_JAL_OP(x3, x13, 0x0, 3f, x2, 112,0)
RVTEST_SIGBASE( x1,signature_x1_0)

inst_29:
// rd==x14, 
// opcode: jal; dest:x14; immval:0x0; align:0
TEST_JAL_OP(x3, x14, 0x0, 3f, x1, 0,0)

inst_30:
// rd==x17, 
// opcode: jal; dest:x17; immval:0x0; align:0
TEST_JAL_OP(x3, x17, 0x0, 3f, x1, 4,0)

inst_31:
// rd==x2, 
// opcode: jal; dest:x2; immval:0x0; align:0
TEST_JAL_OP(x3, x2, 0x0, 3f, x1, 8,0)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4

rvtest_data:
.word 0xbabecafe
.word 0xbabecafe
.word 0xbabecafe
.word 0xbabecafe
RVTEST_DATA_END


RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x2_0:
    .fill 0*(XLEN/32),4,0xdeadbeef


signature_x2_1:
    .fill 29*(XLEN/32),4,0xdeadbeef


signature_x1_0:
    .fill 3*(XLEN/32),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*(XLEN/32),4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
