From e4fa51cce4afa46516b1c6ecdaaae58b378edccd Mon Sep 17 00:00:00 2001
From: Alexios Maras <100875700+alexmr09@users.noreply.github.com>
Date: Fri, 26 Jul 2024 14:02:34 +0300
Subject: [PATCH] Update README.md
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README.md | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/README.md b/README.md
index f57a0d2..09a6818 100644
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@@ -24,7 +24,7 @@ This repository includes:
A brief overview of the whole process can be seen in the following flowchart:
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## Build the RISC-V Toolchain
@@ -141,7 +141,7 @@ The next step involves creating the Quantized Model using the [Brevitas](https:/
1. "**Exhaustive**" Design Space Exploration. This method allows us to observe how our network behaves when utilizing different weight configurations. It's suitable for relatively small models (up to 5 or 6 layers) and ensures finding the optimal solution. However, for larger models, efficiency becomes crucial. To expedite the process, we can either uniformly quantize consecutive layers and treat them as a single unit, or we can use a fixed bit-width for the weights of layers with lower workload. While this approach may yield sub-optimal solutions, the results are typically satisfactory. To utilize this approach for a given network, we can set the *max_acc_drop* variable to *None*.
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2. In the second case, the user sets the maximum allowable accuracy degradation. We utilize a binary search algorithm across a pre-sorted array of all potential model configurations, ordered by their projected latencies. This approach significantly enhances efficiency by examining merely `log2(3^L)` configurations, swiftly identifying a solution that conforms to the user's accuracy requirements. To utilize this approach for a specific network we need to set the *max_acc_drop* variable to a specific value.
@@ -169,7 +169,7 @@ Integer Multiplication and Division (M), Compressed (C), and B (Bit
Manipulation) extensions.
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You can explore the codebase for the Ibex repository on GitHub by visiting [lowRISC/ibex](https://github.com/lowRISC/ibex).
@@ -190,7 +190,7 @@ The overarching objective is to amplify the throughput of MAC operations per cyc
- **Soft SIMD** : We pack 2 multiplications inside a single multiplier, when asked to calculate the products between 2-bit weights and the 8-bit inputs of each layer.
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## Inference Simulation Using Verilator